Memory mapped I/O
Executing I/O operations by storage address
The ports from $E000 to $E008 are allocated to these functions and chips:
- $E000 – $ E003: PPI 8255 Programmable Peripheral Interface
( sometimes called too as Programmabel Parallel Interface or PIO Programmable I/O. The original INTEL name is Programmable Peripheral Interface )
- $E004 – $E007: PIT 8253 ( Programmable Interval Timer )
- $E008: Interface for 2 joysticks and some special functions more ( HBLNK, tempo, counter start/stop/read )
Memory mapped I/O is to be used to get access to these ports like getting access to normal RAM. Before you can get access to these ports take a look at bank switching for these ports. These ports will be allocated only for access if you turn on the area above $D000 by bank switching. Otherwise RAM could be allocated and unpredictable results may occur while executing your own programs.
- I assume you are familiar with the functions and the programming of the 8255 and the 8253. Functions and programming of these chips are too complex to be discussed in detail here. I try to give a simple overview of the functions of the 8255 and of the functions of the 8253 to enable you to understand the functions of the 8255/8253 in your MZ’s. Fur further MZ-related details select the appropriate items in the menu ( 8253 / 8255 subdocuments ).
- If you want to get more familiar with these chips, you can download complex data sheets including a detailed description of the 8255 ( PDF, 326 kb ) and of the 8253 ( OKI, PDF, 135 kb ). Essentially the same to the 8253 is the 82C54 which is a superset of the 82C53. If you prefer this datasheet ( Intel, PDF, 240 kb ) download it now.